Dhaval Sorathiya

• Explored battery performance analysis by comparing data from diverse scenarios, including passenger vehicles, electric school buses, and long-haul trucks, providing insights into optimizing battery performance for different use cases. • Built a robot operating system (ROS) package, gaining proficiency in ROS fundamentals, node setup, and understanding the essentials of ROS components. • Examined the integration of ROS components in a practical setting

RTL design involved developing and optimizing ASIC modules using Verilog and verifying functionality with tools like ModelSim/VCS. Synthesis converted RTL to gate-level netlists using Synopsys Design Compiler, ensuring constraints like timing and power were met. STA with PrimeTime verified timing across PVT corners. In physical design, Cadence Innovus was used for floorplanning, placement, and routing, ensuring DRC/LVS compliance. The final GDSII file was generated, verified, and prepared for fabrication.

Skilled in embedded system design with expertise in developing and optimizing firmware for microcontrollers and embedded platforms. Proficient in C/C++, RTOS, and hardware-software integration, focusing on real-time performance and efficiency. Experienced in designing drivers, interfacing peripherals, and debugging with tools like JTAG and logic analyzers. Adept at working with industry-standard protocols (I2C, SPI, UART) and ensuring system reliability for various applications.