Donato Manzan

- Design of signal processing elements for LTE eNodeB - Modeling of PHY and MAC in Matlab/Simulink - Implementation on FPGA and verification through Modelsim/Simulink

- SoC architecture (~250k gates at 0.18um), RTL design, simulation, synthesis, timing analysis and IP integration - Elaboration of verification plan based on random tests and design of verification environment - Design of analog RF-DC converter and LDO regulator (weak inversion) for RFID - Analog layout and physical verification (DRC, ERC, LVS). Full chip verification

- Micro-architecture of SDH/PDH network terminators and add-n-drop multiplexers - RTL coding with multiple clock domains, synthesis and timing analysis - Real-time fixed-point DSP datapath design - Verification with Matlab/Simulink and in-system debug - FPGA – board integration. High density board floorplanning and signal integrity analysis of high capacity traffic signaling (CML, LVDS) for Gigabit Ethernet and PoE cards

- Taught digital circuits and analog IC flow (Mentor Graphics) undergraduate classes

Trainee in development of a potentiostat used to analyze molten glass’ electrical properties. Designed mixed-mode board level signal conditioning circuits for sensors with high impedance output, PCB (dealing with tracks of high impedance signaling) and implemented codes for signal processing and device control in HC12 microcontroller

Design of digital and analog board-level circuits for sensors signal conditioning, microcontroller programming

- Analog IC design for signal conditioning - VHDL - Digital Signal Processing - VLSI