Franz Steininger

For the last 8 years I have been part of the team designing the multimedia part of chips for tablet and smart phone market. I designed a Nexus compliant debugger, a custom processor used inside the video encoder/decoder and the SIMD floating point vector­-processor for 3D­Graphics. As required by design­ cycle I helped out in verification, RTL improvements to achieve easier timing closure, power optimizations, STA etc.

Enhancements, addition of missing features and bug fixes of an existing L220 simulation model. L220 is a Level 2 cache from ARM with AXI bus interfaces. The goal of this program was to have a cycle accurate model matching existing Verilog.

Developmenr of a combined RISC/DSP capable to run Linux. SoC included peripherals USB, Compact Flash I/F, Memory Controller including Mobile DDR, Ethernet, CAN, UART, I2C, SPI.

Development of C/C++ models, improvements of ColdFireV5 and synthesizable PowerQUICC.

Design of Domain Specific Instruction-set Processor, and high level modelling of wireless handsets.

Part of a team from Phillips and Motorola to develop the CD Interactive chip­set.

Customer support for various ASIC / Gatearrays, Design of Canal+ Pay TV decoder, and 68000 microprocessor on CDA (Custom Defined Array).