Gautham Rangasamy

Angestellt, Integrated Photonics Microfabrication Engineer, Q.ANT GmbH
Lausanne, Schweiz

Fähigkeiten und Kenntnisse

Python
Semiconductor device fabrication
Microelectronics
FPGA
Modeling
VHDL
Software Development
Research and Development
Verilog
Circuit design
Characterization (materials science)
MatLab/Simulink
Device technology
Physics
Photonics

Werdegang

Berufserfahrung von Gautham Rangasamy

  • Bis heute 1 Jahr und 10 Monate, seit Jan. 2024

    Integrated Photonics Microfabrication Engineer

    Q.ANT GmbH

    • PIC microfabrication — lithography, etching, deposition, and metrology — on LiNbO3, BaTiO3, Si and SiN • Process development to scale PIC manufacturing from the R&D to pilot line (from TRL 4 to 7) • Performed wafer-to-wafer bonding for the fabrication of thin-film lithium niobate on insulator (LNOI) wafers • Drafted an early-stage workflow integrating SPC into fabrication to support the transition from R&D lab to pilot line manufacturing.

  • 5 Jahre und 4 Monate, Sep. 2018 - Dez. 2023

    PhD Candidate

    Lund University

    • Epitaxial growth of III-V compounds using MOCVD techniques for low-power electronics • Nanofabrication of vertical III-V based tunneling transistors and circuits • Conducted physical simulations and experimental validation of self-heating effects in vertical transistors • DC, pulsed IV, CV, and RF characterization of transistors and analyses using MATLAB and Python for benchmarking and material investigation at room and cryogenic temperatures

  • 1 Jahr, Juli 2017 - Juni 2018

    Electronics Engineer

    Sogeti Nederland B.V.

    • Implementation of process chains in VHDL and verification with simulation test benches (100% code coverage tests) • Deployment to development and target FPGA hardware and support verification at processor and system level • Clients included Airbus and Innosport

  • 8 Monate, Nov. 2016 - Juni 2017

    Post-Graduate Researcher

    QuTech

    • Process development and fabrication of strained-Si based MOSFETs • Device Modelling of strained-Si based MOSFETs in Verilog-A • Design of Si/SiGe based (de-)multiplexers

  • 10 Monate, Okt. 2013 - Juli 2014

    Consultant

    Accenture

    Consult, prototype and manage implementation of ERP solutions

  • 6 Monate, Jan. 2013 - Juni 2013

    Intern at Automotive Products Group

    STMicroelectronics

    • Prototyping of Micro-controllers in FPGA with VHDL • Voltage and Thermal reliability analysis of IC chips with Python

Ausbildung von Gautham Rangasamy

  • 5 Jahre und 4 Monate, Sep. 2018 - Dez. 2023

    Nanoelectronics

    Lund University

  • 2 Jahre und 1 Monat, Sep. 2014 - Sep. 2016

    Microelectronics

    TU Delft

    Thesis - Fabrication of Si/SiGe transistors for addressing large-scale qubit arrays for quantum computer

  • 3 Jahre und 10 Monate, Sep. 2009 - Juni 2013

    Electronics

    VIT University

Sprachen

  • Englisch

    Muttersprache

  • Tamil

    Muttersprache

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