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Lakshmidas Kaippencherry

Angestellt, VLSI Physical Design Engineer, Cadence Design Systems
Bengaluru, India

Skills

VLSI Design
PNR
STA
Timing Signoff
Synthesis
Clock tree synthesis

Timeline

Professional experience for Lakshmidas Kaippencherry

  • Current 6 years, since Aug 2020

    VLSI Physical Design Engineer

    Cadence Design Systems

  • 3 years and 11 months, Sep 2016 - Jul 2020

    VLSI Project Engineer

    Wipro Technologies

Educational background for Lakshmidas Kaippencherry

  • 2 years, Aug 2014 - Jul 2016

    M.Tech in VLSI Design

    Amritha University,Coimbatore

Languages

  • English

    C1 (Fluent)

  • Malayalam

    C2 (Expert / native speaker)

  • Hindi

    B1-B2 (Good)

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