Narayana Krishanmurthy

Implemented DC/DC and 3.3 V buck converter modules using vendor reference layouts, optimized current loops, copper polygons, thermal vias, return paths and practical test points. Built mixed-signal and USB-based boards (MCU + ADC, USB-C to MCU/USB-UART), practicing analog/digital partitioning, grounding concepts, reference routing and basic differential-pair routing strategies.

• Designed a low-power variable gain amplifier (100 MHz, 10 dB) using the Cadence design flow, including layout preparation and optimization for performance and area. • Developed an 11.6 GHz PLL in 65 nm CMOS and performed post-layout Spectre simulations, gaining strong understanding of layout-dependent effects, parasitics and verification flows.