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Pilla Saikumar

Angestellt, VLSI senior design Engineer, sevya multimedia technologies
Hyderabad, India

Skills

vlsi
lint
synthesis
static timing analysis
verilog
system verilog
RDC
CDC
UPF
linting

Timeline

Professional experience for Pilla Saikumar

  • Current 5 years and 3 months, since Jul 2021

    VLSI senior design Engineer

    sevya multimedia technologies

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