Raoul Jerome Homeres

Responsible for hardware and reliability design verification through product quality and functionality assurance by appropriate environment and reliability tests. Responsible for producing testing strategies in close cooperation with other development teams and is the primary contact to product programs for all Hardware Validation-related issues starting from product conception, though product development up until mass production.

Qualifications and Reliability Integration - Responsible for the timely and successful qualifications (fab process, product, package) on various products (standard linear ICs, ASSPs, and ASICs for commercial, industrial, medical, and automotive companies) starting from the qualification scope definition (based on JEDEC and AEC standards), managing the reliability testing (HTOL, HAST, uHAST/AC, TC, ESD/LU, etc.), up to production release, including the execution of documentation and APQP, FMEA, PPAP, PCN/PCP

Failure Analysis – responsible for performing physical and electrical failure analysis of integrated circuits for external and internal customers (design, wafer fabrication, test, etc.) through various failure analysis techniques, electrical verification and reliability testing to determine the device conformance to specifications and identify the failure mechanism and root cause. Responsible for the execution of the 8D problem solving process to resolve accepted failures caused by process/material problems

Tool Ownership - Equipment owner for the following tools and is responsible for providing training and support to target users and ensuring that the equipment is problem-free: TDR, Phoenix Manual Polisher and the Laser Sesame 1000. Enabled the release of Cu-wire FA techniques by developing decapsulation recipes and proliferating those recipes through training. -------------------------------------- Production Dry-Bake Reduction Program - Enabled production cost reduction through dry-bake time evaluation.