Sakshi Goel

is about to graduate. 🎓

Bis 2019, Product Validation Engineer, Cadence Design Systems

Freiburg, Deutschland

Über mich

Currently, I am doing my thesis for Masters in Embedded Systems at the University of Freiburg with a specialization in Design and Intelligent Systems. I am looking for a job starting June 2022 I worked as a Product Validation Engineer at Cadence Design System, Noida. My major responsibilities included feature testing and sign-off for Assertion-Based Verification for Cadence Simulator Xcelium. I completed my Bachelor's in Electronics and Communication Engineering from Maharaja Surajmal Institute of Technology. I enjoy learning about the latest technological advancements. I strongly believe in giving back to the community and that quality education is one's basic right.

Fähigkeiten und Kenntnisse

ASIC
Scripting
Python
Verilog
Deep Learning
Linux
GitHub
FPGA
system verilog
Pytorch
TensorFlow
Machine Learning
Neural Networks

Werdegang

Berufserfahrung von Sakshi Goel

  • Bis heute 3 Jahre, seit Okt. 2021

    Master Thesis Student

    Hahn-Schickard-Gesellschaft für angewandte Forschung e.V.

  • 5 Monate, Mai 2021 - Sep. 2021

    Intern

    Infineon Technologies
  • 1 Jahr und 2 Monate, März 2020 - Apr. 2021

    Research Assistant

    Hahn-Schickard-Gesellschaft für angewandte Forschung e.V.

    Design and Implementation feature extractor for Decision-tree ensembles on an ASIC to analyze ECG data. • Python scripts for Feature extraction of ECG data • MatLab (Statistical Learning Toolboxes/Apps). • System Verilog programming • Xilinx Vivado™ Design Suite • TCL-Script • Linux

  • 3 Jahre und 4 Monate, Juni 2016 - Sep. 2019

    Product Validation Engineer

    Cadence Design Systems

    -Functional verification of Cadence Simulation tool Xcelium using System Verilog, Verilog - Functional specification review, test-plan creation, directed and automated testing using scripting languages like Perl, Python, Tcl. - Interrelation and Interpolation testing for ABV(Assertion Based Verification) features with Low-Power using UPF files,MSIE, Coverage-driven verification

Ausbildung von Sakshi Goel

  • Bis heute 5 Jahre, seit Okt. 2019

    Embedded Systems Engineering

    University of Freiburg

  • 2012 - 2016

    Electronics and Communication Engineering

    Maharaja Surajmal Institute of Technology

Sprachen

  • Deutsch

    Gut

  • Englisch

    Fließend

  • Hebräisch

    -

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