madhuri thummakuru

Developed and implemented a bare-metal application on the Trenz Versal Al Edge TEO950 platform, generating and transmitting a 50Hz sine wave via ARM cores to the FPGA, and designing an FPGA system to process data and interface with the AI Engine (AIE). Programmed the FPGA to transfer 500 samples of 32-bit dummy data to the AIE, created a computation pipeline for processing, and established bidirectional communication between ARM cores, FPGA, and AIE.

Completed structured training in low-level programming and digital system design with a strong focus on embedded and FPGA development. Developed RTL logic using VHDL/Verilog, including simulation, debugging, and hardware-level testing. Practiced FPGA workflows — from coding and synthesis to timing checks and real-time system execution using industry-standard tools.

Thesis: Ultra-Low-Power DSSS/BPSK Communication System Design Developing an ultra-low-power, energy-efficient wireless communication system based on DSSS/BPSK modulation. The project involves MATLAB-based waveform simulation, BER performance analysis, and FPGA (Spartan-7) implementation of the digital baseband using VHDL for real-time validation under ETSI UWB compliance standards.

Thesis: Design and Simulation of a Karatsuba Multiplier using VHDL Implemented individual computational blocks of the Karatsuba algorithm using VHDL and integrated them into a complete multiplier architecture. Performed functional simulation to analyze performance improvements in speed and resource efficiency.