Ing. Akshay Bohra Prakash

Test Chip design Engineer

Designed a linear fully differential transimpedance amplifier for coherent optical receivers in 45nm silicon photonics technology. • A transimpedance gain of 42.58 dB with a 3-dB bandwidth of 42.78 GHz was achieved. • Used Cadence Virtuoso and Advanced Design System (ADS) software tools for schematic and layout design.

1. Responsible for designing a Serial Peripheral Interface (SPI) in Master-Slave configuration in Verilog. 2. Circuit synthesis was carried out in the Cadence genus software tool and the Place and Route (PNR) step was carried out in Cadence Innovus.

1.Worked on processor and FPGA modelling in MATLAB Simulink. 2. Wrote test scripts in Python and MATLAB m-code for automatic testing of FPGA based Real time systems.

Designed an Analog Multiplexer comprising 18 D Flip-Flops as part of a Manchester Code generator. The circuit was designed in 28nm technology. A working frequency of 30 GHz was achieved.

Signals and Systems Control Systems VLSI Design Verilog HDL Field Theory Circuits and Systems