Denis Fröhlich

As Digital-IC designer realising back-end and front-end designs of mixed-signal IC with the Cadence toolchain in process technologie of TSMC in 65nm and 28nm low power CMOS technology as well as GF 22nm FDSOI technology. In frontend I am responsible for design planning, RTL coding (VHDL) and verification via testbenches. In backend I am responsible for synthesis , place and route (floorplaning), timing analysis, power analysis, physical implementation, design finish and signoff checks.

As FPGA designer I am realising complex FPGA-designs for scientific CubeSat space electronics and scientific medical PET(Positronen-Emissions-Tomographie) applications. Systems ranging from Xilinx SoC (System-on-Chip) modules (Zynq and Ultrascale+) with commercial CMOS detectors to Xilinx Virtex 7 with high speed interfaces like 10Gigabit Ethernet SFP+ (fiberoptics) and PCI-express for data transmission and readout.

Entwicklung von Elektroniken für wissenschaftlicher Instrumente auf Satelliten

Tutor für Mikroelektronik, Praktikums-Betreuung Mikroprozessortechnik (Assembler)

HMI-Entwicklung für Stahlwerke mittels C#/.NET und Oracle

HMI Entwicklung für Industrieanlagen mittels C++ und MS-SQL / Oracle

Mikroelektronik

Mikroelektronik