Kumar Apoorv

• Own full-cycle RTL-to-GDSII physical implementation for hierarchical and leaf-level blocks (2M+ instances) on a next-generation data-centre SoC, meeting high-frequency targets above 2 GHz. • Mentored and coordinated contract engineers on PnR methodology, aligning delivery schedules with tape-out milestones. • Partnered with cross-site sign-off teams on partition quality; independently resolved EM/IR, DRC and ECO issues to meet reliability requirements.

• Ownership of multi-million-instance partitions (>1 GHz, multiple power domains, high port count) on the Intel 3 process node. • Executed sign-off across timing closure, signal integrity, LEC, multi-voltage, low-power and structural checks across multiple corners. • Coordinated with global RTL, STA and sign-off teams to clear implementation bottlenecks against tape-out milestones.