Muhammad Jazib Khan

- Lead/Owner of the complete digital design and RTL implementation and verification flow for a Neuromorphic mixed signal chip under project ANDANTE (https://www.andante-ai.eu/) - Important keywords: Data path, Control Path, FSM, SPI, Network on Chip, SRAMs, Custom Instruction Set Architecture, Configuration Bus, Data reuse, Convolution Neural Networks etc.

Innovative design and hardware implementation of a Programmable Address Generation Unit for Deep Neural Network accelerator. - Algorithm design for the address pattern generation of input, filter weight and output for CNNs. - Design space exploration for the implementation of these algorithms in hardware to generate three addresses per cycle. - Micro-architecture design and ISA design of the opted VLIW ASIP based approach. - System Verilog based implementation of the complete processor architecture.

- Exploring different ASIC and FPGA based hardware accelerators for Deep Learning and understanding the working of DNN accelerators specifically used in semantic segmentation for autonomous driving. - Modeling and simulation of DNN accelerators in Synopsys Platform Architect Ultra. - Development of a trans-compiler framework to generate .tcl code from python to automate the modeling of accelerators in Synopsys Platform Architect Ultra.

I co-founded CricFlex and took it to heights that very few Pakistani startups have yet achieved. Cricflex bagged more than 10 national and international recognitions. • Determining technological milestones, when and where to invest time and resources in technical tasks. • Preparing for and delivering investor and competition pitches and presentations. • Hands-on experience in Embedded system design and firmware development.

Digital Design with HDL Embedded Hardware Design in ASIC and FPGA Embedded Many-Core Architectures ICT Innovation

Advanced Computer Architecture Analysis and Optimization of Embedded Systems Applied Embedded Systems Project Quality Assurance of Embedded Systems Strategic Management