Pallavi Upadhyay

is working from home. 🏡

Angestellt, Senior Quality & Reliability Engineer-Functional Safety, TE Connectivity - Energy
Berlin, Germany

Fähigkeiten und Kenntnisse

Hardwareentwicklung
OrCAD
Simulation
FMEA
FMEDA
SVN
Hardware Design
Testing
Reliability engineering
ISO26262
Functional safety
Engineering
Battery management system
hara
Impact analysis
Powertrain
ISO21434
B1.1 german
TARA

Werdegang

Berufserfahrung von Pallavi Upadhyay

  • Current 2 months, since Apr 2026

    Senior Quality & Reliability Engineer-Functional Safety

    TE Connectivity - Energy

    • Managing functional safety activities for powertrain project encompassing impact analysis, HARA, V&V while coordinating with customer and cross functional teams to meet Quality gate deadlines. • Performing safety engineering encompassing concept phase, product development at SW level, system level & supporting processes as per ISO26262.

  • 11 months, Jan 2022 - Nov 2022

    Functional safety Engineer

    ZF Group

    • Analyzed safety mechanisms for diagnostic coverage based on Part 5 argumentations. • Performed FMEDAS to calculate RHFM using Medini Analyzer. • Provided functional safety training to project team • Performed FTA for ASIL D Brakes.

  • 3 years and 8 months, Mar 2018 - Oct 2021

    Specialist

    Mando Corporation

    • Designed & improved circuit for solenoid control in ECU. • Designed circuit for sensor inputs in ECU around NXP & Infineon AURIX Core MCUs. • Designing schematic on ORCAD & performing design simulations using PSPICE. • Performed Hardware component qualification asper ISO26262 for power MOSFETs & Gate driver IC sensor & Regulator Ics • Performed Safety analysis for hardware including DFMEA, FMEDA & FTA for Steering, Suspension & DCU Systems. (ASIL QM, B &D)

  • 2 years and 4 months, Oct 2012 - Jan 2015

    Senior hardware engineer

    Mando Corporation

    • Designed hardware simulator for the automotive end product. • Eradicated the problems in the existing design as and when reported from field testing. • Performed successful board bring up of new design & worked with cross functional teams for integration testing. • Performed Hardware component qualification asper ISO26262 for ASIC • Documented technical specifications of design, design document, requirement specification, DAR.

  • 3 years and 6 months, Apr 2009 - Sep 2012

    Hardware Engineer

    Larsen & Toubro IES
  • 1 year and 8 months, Sep 2009 - Apr 2011

    Hardware Engineer

    Applied electromagnetics Pvt Ltd

  • 1 year, Apr 2008 - Mar 2009

    Apprenticeship Graduate

    Bharat Electronics Limited

Ausbildung von Pallavi Upadhyay

  • 4 years and 1 month, Apr 2003 - Apr 2007

    Electronics and Communication Engineering

    Uttar Pradesh Technical University

Sprachen

  • English

    C1 (Fließend)

  • Korean

    A1-A2 (Grundkenntnisse)

  • Hindi

    C2 (Verhandlungssicher / Muttersprachlich)

  • German

    B1-B2 (Gute Kenntnisse)

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