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Aditya Remella

Angestellt, Trainee, Maven Silicon
Vijayawada, Andhra Pradesh, India, India

Skills

Verilog
System Verilog
Assertions
Digital Design
Field Programmable Gate Array (FPGA)
CMOS
Universal Verification Methodology
ASIC Design
MS Office
PowerPoint

Timeline

Professional experience for Aditya Remella

  • Current 3 years and 6 months, since Dec 2022

    Trainee

    Maven Silicon

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