Mag. Antonio Popovic

FPGA design, simulation, verification, implementation, and optimization. AXI Infrastructure and usage of Xilinx Design Tools. Troubleshooting and debugging. Electronics measurements, soldering, and oscilloscopes usage. Vivado IP Development and testing. VHDL development. Xilinx’s ZYNQ, UltraScale Design, and board bring up. Timing Constraints, Scripting, TCL, Petalinux, testbenches. Implementation of Xilinx’s technical FPGA solutions, like usage of Fastboot, MultiBoot, Partial reconfiguration, DFX.

Student work job during the graduate study, daily providing technical assistance to wide range of users, expanded knowledge about telecommunications and ADSLtechnology and systems. Practical knowledge of VOIP, IPTV and VDSL technologies, knowledge of the infrastructure network of the telecommunications service provider. Team leader in charge of for the supervision and operation of a group of agents after 4 months of work.