Jens Rennert

Product management for medical imaging, display and illumination technology

•Created Micronas first connected TV platform in 9 month from partner selection until finished prototype ready for customer promotion •Developed business cases and technical concepts for connected TV platforms •Managed in-company development team and 3rd party development partner cooperation •Interface person for marketing/sales and TV manufacturers for advanced TV architectures

•Responsible for complete H.264/VC1 chip project including hardware design, software design, production ramp-up and application •Organized and managed hardware and software development teams •Hardware and software architecture guidance and review •Project management (planning, execution according to development milestone process, tracking)

•Responsible for the entire multimedia product portfolio •Business development at major PC-manufactures, ODM manufactures and software suppliers •Managed department marketing activities (press releases, white papers, conferences, trade shows) •Responsible for hardware and software application development (PCIe, USB and Networked PC-TV solutions, USB-Audio product line, analog video decoder product line) •Installed product test and certification procedures according to PCI-SIG, Microsoft WHQL, USB-Org

•Responsible for PCIe multimedia processor IC development project •Responsible for chip and software architecture •Managed 3rd party hardware and software development activities at Cadence-UK, Infineon-Germany and P&B-USA •Architected and developed FPGA based verification, prototyping and production test systems

•Algorithmic exploration and mapping of audio codec to a reconfigurable hardware architecture •Participated in open source project (C++/QT based implementation of a VCD signal browser) •System-C/QT based AHB system implementation with transaction logging for architectural exploration •Developed System-C video decoder, at real time port to a Linux PC cluster •Architectural studies and System C modeling of radix 2 FFT and Viterbi decoder, sample rate converter, mixer, DMA sequencer and programmable fil

- Architectural lead for picture quality enhancement algorithms into video pipeline for Set-Top-Box and Hybrid TV/STB chip - Defined scalable video composition processor architecture for Set-Top-Box and Hybrid TV/STB - Project lead and architectural head of video pipeline design team - Set-Top-Box chip silicon validation - Architectural lead for video/audio back-end chip - Managed emulation activities for the Set Top Box controller - Developed synthesis and design analysis GUI to automate the synthesis proc

•Top-level design, test insertion, pattern generation and test verification for digital video encoder ICs •Specified and designed VCR - copy protection algorithm •Specified and implemented VBI data engine for inserting CC, Teletext, VPS and CGMS in video data •Specified and implemented fading, color-key and blue box unit for video encoder •Designed FPGA-based encoder emulation system

University of Aberdeen