Kashif Nisar

Fähigkeiten und Kenntnisse

Cadence
Cadence Schematic Capture
Cadence Spectre
Cadence Virtuoso
Cadence Virtuoso Layout Editor
Microsoft Office
OrCAD
Proteus
QOBE

Werdegang

Berufserfahrung von Kashif Nisar

  • Bis heute 2 Jahre und 10 Monate, seit Okt. 2023

    PhD Student

    The University of Pavia

    1. Designed the two stage OTA in standard 28nm CMOS technology for Aerospace applications. 2. Designed different topologies of Low drop out voltage (LDOs) in 65nm CMOS technology. 3. Designed Fully differential amplifier with active load using crosscoupled bulk for enhancing the gain and CMRR in 28nm CMOS technology. 4. Designed the BGR circuit in 65nm CMOS technology. 5. Designed the latched charge pump for LDO topologies in 28nm CMOS technology.

  • 8 Monate, März 2025 - Okt. 2025

    Doctoral Researcher

    Aarhus University

    Designed the Layout of the OTA in 28nm CMOS technology, performed corner analysis and results validated through post layout simulations. Designed the Layout of the LDO in 28nm CMOS technology and validated its results using post layout simulations. Designed the schematic as well as layout of the BGR circuit in 65 nm CMOS technology, performed corners analysis and validated the results through post layout simulations .

  • 7 Monate, März 2023 - Sep. 2023

    Visiting Lecturer

    Bahria University Islamabad,Pakistan

    Teaching VLSI design at Computer Engineering Department

  • 8 Jahre und 4 Monate, Juni 2015 - Sep. 2023

    Design Engineer (Integrated Circuits)

    National Institute of Electronics

     Worked on full custom design of SAR-ADC using Cadence Virtuoso in 45nm CMOS Technology  Worked on full custom design of DLL (All digital Phase locked loop) using Cadence Virtuoso in 65nm CMOS Technology  Designed the full custom design of Integrated Circuit  Worked on Transistor level Simulation  Worked on Layout level  Performed DRC, LVS using PVS and Parasitic Extraction using Quantus in Cadence Virtuoso  Post Layout Simulation  Conducted Trainings and Workshops on IC design tools  Worked on Dig

  • 2 Jahre und 9 Monate, Sep. 2012 - Mai 2015

    Senior Lecturer

    The University of Lahore

    Teaching Electrical and Electronics Engineering courses (Integrated Circuits, Electronic Devices and Circuits, Circuit Theory) at undergraduate level in Electrical Engineering department.  Supervising the final year projects.  Program Evaluations  OBE implementations.  Conducting the exams.  Making the award sheets of undergraduate students.  Performing the lab tasks with the students.  Maintains and regulates the labs according to the Pakistan Engineering Council guidelines.  Implementation of the

Ausbildung von Kashif Nisar

  • Bis heute 2 Jahre und 11 Monate, seit Sep. 2023

    Doctor of Philosophy - PhD

    Università di Pavia

    Design of Integrated Circuits

  • 1 Jahr und 10 Monate, Aug. 2010 - Mai 2012

    Masters in Electrical Engineering

    Linköping University

    VLSI Design Analog Integrated Circuits Chip Designing

  • 4 Jahre und 3 Monate, Juli 2004 - Sep. 2008

    Bachelor of Engineering - BSc

    FUUAST

    VLSI Design Integrated Circuits Electronic Devices and Circuits

Sprachen

  • Englisch

    C2 (Verhandlungssicher / Muttersprachlich)

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