sathishkumar chakarapani

- Developing VHDL based IP design for various ADC interfaces and special sensor measurements - Bare-metal programming for Embedded CPUs in FPGAs - Familiar with Xilinx Zynq and Artix FPGAs - Familiar with HDL designer, VIVADO design suite, and ModelSim simulation environments

Title "Investigation and Implementation of safety mechanism on Infineon AURIX Tri-core CPU"

Design and Development of Half-Bridge Driver circuit hardware for Si, SiC and GaN materials MOSFTEs. Work package includes designing PCB in MentorGraphics Expedition and Evaluation of switch characteristics.

Partial responsibility with Piaggio & C. SpA (Italy) R&D team for Vespa platform, Vehicle and Engine Electrical aggregates design and development. APE city (3 wheeler) and PORTER 1000 (4 wheeler) Engine electrical aggregates design and development.

Worked as Electrical Engineer with Auto Electrical Design group of TATA ERC on HCV and LCV categories Bus and HCV trucks category. Responsible for Electrical & Electronics system/aggregates integration.

Responsible for Two wheeler Electrical and Electronics aggregates evaluation for new products

Two wheeler segment new and regular product Electrical parts Performance, Endurance, reliability and environmental testing

Electronics

Vehicle Engineering, Automobile Electric Drives, Automotive Electronics 1,Simulation, Automotive Electronics 2, Electrical & Hybrid Vehicles and Renewable Energy