Ioana Corduneanu

Block level Pre-Silicon Functional Verification  Set up OVC and tests for signal measurement interface and power supply verification  Set up new register sequences reusing existing code and Cadence RGM API  Set up and debug assertions using SVA  Set up and run regression, report status, assign bugs, track and follow up bug status  Reviewed and analyzed product requirements from client and provided feedback  Reviewed and analyzed design specification from desi

 Reuse existing C firmware for BMW rear light control  Set up test cases according to feature list  Language used: C  Tools used: Eclipse, Proprietary tools

 Read and understand FIPS 140 standard (Federal Information Processing Standards)  Verify that the software and software documentation were compliant to FIPS 140 standard  Present to the designers the non-compliance, track status and test solutions  RTL design: crypto block - secure channel for data transmission over public network (IP data transmission)  Test design using FPGA (synthesis, lab testing)  Language used: VHDL  Tools used: QuestaSim, Xilinx

- Chip card division - diploma project  RTL design: pipeline processor with RISC architecture  Test design using FPGA board (synthesis, lab testing)  Set up design specification and user manual  Bachelor paper sponsored by Infineon  Language used: VHDL  Tools used: QuestaSim, Altera (Quartus)

- Chip Card division - internship  RTL design: I2C controller interface (it provided serial communication between SLE70 and other devices)  Internship sponsored by Infineon  Language used: VHDL  Tools used: QuestaSim

Master of Modern techniques for Signal Processing – Faculty of Electronics, Telecommunications and Information Technology- Technical University of Iasi, Romania

- Title of qualification awarded: PC Operator, assistant programmer